High Performance 8-core Floating Point DSP
ER-DSPC-30 is a high-performance 8-core floating-point DSP with the following overall structure:
The main performance indicators of ER-DSPC-30 are as follows
The single chip integrates eight 1GHZ main frequency DSP cores,which compatible with TI C66X, compatible with TI's TMS320C6678 instruction set, with basically the same peripherals , the package is the same, pin-compatible, and the development environment is compatible with TI CCS5.0 and below.
Efficient three-level storage structure: L1 adopts the Haval structure (L1P, L1D), L2 is the configurable structure within the core, and L3 cores share storage. L1P: 32KB/core, L1D: 32KB/core, L2: 512KB/core (configurable), L3: 4MB
Abundant peripheral storage interfaces, supporting DDR3, FLASH, ASRAM and other storage interfaces;
1 DDR3 controller: 64-bit DDR3 interface, storage bandwidth 1600MT/s;
EMIF: 32-bit data, supports 16-bit asynchronous access mode, supports SBSRAM, synchronous FIFO, synchronous access frequency 100MHz;
High-Speed Interface
2 Serial RapidIO high-speed serial links, each with 4 lanes, 3.125-5Gbps\/lane;
1 PCIE high-speed serial link: 4 lane, 5 Gbps/lane;
1 SGMII Ethernet interface: 1000M/100M/10Mbps rate
Low-speed interfaces: SPI, I2C, UART, GPIO, 1553B.
Integrated Peripherals:
Global signal light registers with multi-core synchronization;
16 timers, configurable watchdog mode;
1 x 2-channel 256-bit wide DMA;
2 x 4-channel 128-bit wide DMA;
1 FFT hardware accelerator
Process: 28nm CMOS process
Operating Voltage: VCC(IO)=1.8V, VCC(Core)=0.9V (±5%)
Operating temperature: -55°C~125°C; Storage temperature: -65°C~150°C
Typical power consumption: The typical power consumption is less than 7W, and the maximum power consumption is not more than 11W;
Adopt PBGA841 package, 24.5×24.5×2.56mm (including solder balls);